当前查询到4条专利与查询词 "郝虹【EN】Jiang Kai"相关,搜索用时0.2812452秒!排序方式:
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申请号:201911343421.3 公开号:CN111159776A 主分类号:G06F21/64
摘要:【中文】本发明公开了一种自适应神经网络模型验证方法及系统,属于神经网络模型的安全验证技术,本发明要解决的技术问题为如何同时避免模型运行前验证耗时,同时能够检测运行时态的模型是否被篡改,保证验证过程不会显著增加模型的推理时延,技术方案为:该方法具体如下:S1、构造神经网络模型基因模板;具体如下:S101、选取基因模块的候选层;S102、选取候选层模板位置;S2、验证基于模型基因模板的神经网络模型;具体如下:S201、生成和比对种子样本与种子基因;S202、验证运行时态模型。该系统包括基因模板构造单元和神经网络模型验证单元;基因模板构造单元包括候选层选取模块及候选层模板位置选取模块;神经网络模型验证单元包括生成和比对模块及验证模块。 【EN】The invention discloses a method and a system for verifying a self-adaptive neural network model, belonging to the safety verification technology of a neural network model, aiming at solving the technical problems of avoiding the time consumption of verification before the model runs, detecting whether the model in a running state is falsified or not and ensuring that the reasoning time delay of the model is not obviously increased in the verification process, and the technical scheme is as follows: the method comprises the following specific steps: s1, constructing a neural network model gene template; the method comprises the following specific steps: s101, selecting a candidate layer of a gene module; s102, selecting the position of a candidate layer template; s2, verifying the neural network model based on the model gene template; the method comprises the following specific steps: s201, generating and comparing a seed sample with a seed gene; s202, verifying the running tense model. The system comprises a gene template construction unit and a neural network model verification unit; the gene template construction unit comprises a candidate layer selection module and a candidate layer template position selection module; the neural network model verification unit comprises a generation and comparison module and a verification module.
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申请号:201911135162.5 公开号:CN110874419A 主分类号:G06F16/51
摘要:【中文】本发明涉及人工智能领域,具体提供了一种人脸数据库快速检索技术。与现有技术相比,本发明的在人脸识别模型输出的人脸特征向量为多维向量,其中,每一维均为浮点数值标量,人脸特征向量组成的空间认为是Rn空间。其特征在于,包括如下步骤:步骤1、对人脸数据库建立有序分割,保证划分的每个子区间有序;步骤2、基于划分的子区间,在人脸识别时对人脸特征向量进行对比,根据特征向量与中心向量的距离判断分区。根据距离远近对数据库中的人脸记录事先进行分区存储的方法,适当建立索引,在识别人脸时能够大大减小需要查找的候选记录,增加对比速度。 【EN】The invention relates to the field of artificial intelligence, and particularly provides a rapid retrieval technology for a face database. Compared with the prior art, the human face feature vector output by the human face recognition model is a multi-dimensional vector, wherein each dimension is a floating point numerical scalar, and a space formed by the human face feature vectors is considered as RnA space. The method is characterized by comprising the following steps: step 1, establishing ordered segmentation on a face database, and ensuring that each divided subinterval is ordered; and 2, comparing the characteristic vectors of the human face during the human face recognition based on the divided sub-intervals, and judging the subareas according to the distance between the characteristic vectors and the central vector. The method for partitioning and storing the face records in the database in advance according to the distance can properly establish the index, greatly reduce the candidate records to be searched when the face is recognized, and increase the contrast speed。
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申请号:201911187654.9 公开号:CN110913227A 主分类号:H04N19/42
摘要:【中文】本发明涉及边缘智能计算领域,具体提供了一种异构计算架构的边缘端图像压缩系统及方法。与现有技术相比,本发明的异构计算架构的边缘端图像压缩系统,由FPGA‑Video模块、GPU模块组成,FPGA‑Video模块与GPU模块连接;所述FPGA‑Video模块由FPGA板卡以及设置在FPGA板卡上的网络控制器、内存控制器接口、PCIE控制器、网络协议卸载逻辑模块和视频分析逻辑模块组成,所述网络控制器与网络协议卸载逻辑模块和视频分析逻辑模块依次连接;所述GPU模块包括GPU、PCIE Switch芯片和FPGA‑CTRL,所述GPU与PCIE Switch芯片和FPGA‑CTRL依次连接。利用FPGA进行视频实时初步分析,GPU实现视频的压缩,从而达到降低网络传输带宽的目的,具有良好的推广价值。 【EN】The invention relates to the field of edge intelligent computing, and particularly provides an edge image compression system and method of a heterogeneous computing architecture. Compared with the prior art, the edge-end image compression system of the heterogeneous computing architecture consists of an FPGA-Video module and a GPU module, wherein the FPGA-Video module is connected with the GPU module; the FPGA-Video module consists of an FPGA board card, and a network controller, a memory controller interface, a PCIE controller, a network protocol unloading logic module and a Video analysis logic module which are arranged on the FPGA board card, wherein the network controller is sequentially connected with the network protocol unloading logic module and the Video analysis logic module; the GPU module comprises a GPU, a PCIE Switch chip and an FPGA-CTRL, and the GPU is sequentially connected with the PCIE Switch chip and the FPGA-CTRL. The FPGA is used for carrying out real-time preliminary analysis on the video, and the GPU realizes compression of the video, so that the purpose of reducing the network transmission bandwidth is achieved, and the method has good popularization value.
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