摘要：【中文】本发明提出了一种基于格型滤波Burg谱估计算法的低轨卫星多普勒频偏捕获方法，该方法利用Burg算法对接收信号的功率谱进行估计，在低信噪比下估计分辨率和精度比基于快速傅里叶变换的周期图法高，另外，所提出的基于格型滤波的Burg谱估计算法利用了格型滤波器的时间迭代思想，通过引入遗忘因子，将传统Burg算法的块处理方式转变为流处理方式，在每个采样点更新一次自适应回归模型参数，且仅需要用到前一个采样点的相关计算结果，整个计算过程随着时间而迭代进行，因此能够随着多普勒频偏的变化自适应调整AR模型参数，从而适用于低轨卫星多普勒时变的场景，并且这种流处理方式也易于在现场可编程门阵列中实现。 【EN】The invention provides a low orbit satellite Doppler frequency offset capturing method based on a lattice filtering Burg spectrum estimation algorithm, the method utilizes the Burg algorithm to estimate the power spectrum of the received signal, the estimation resolution and precision are higher than those of a periodogram method based on fast Fourier transform under low signal-to-noise ratio, in addition, the proposed Burg spectrum estimation algorithm based on lattice filtering utilizes the time iteration idea of lattice filters, by introducing a forgetting factor, the block processing mode of the traditional Burg algorithm is converted into a stream processing mode, the parameters of the self-adaptive regression model are updated once at each sampling point, and only the correlation calculation result of the previous sampling point is needed, the whole calculation process is iterated along with the time, so that the parameters of the AR model can be self-adaptively adjusted along with the change of Doppler frequency offset, therefore, the method is suitable for low-orbit satellite Doppler time-varying scenes, and the stream processing mode is easy to realize in a field programmable gate array.

摘要：【中文】本申请实施例提供了一种基于LDPC编码器的数据处理方法、装置、终端及存储介质。其中方法包括：获取待处理的信源比特流，并确定预编辑的配置信息；基于配置信息，在预存储的多个码表中确定目标码表；依据配置信息对信源比特流进行分组，并根据分组结果将目标码表构造为相应的校验矩阵；确定各个分组各自对应的针对校验矩阵中校验比特的索引地址；依据各个分组各自对应的针对校验矩阵中校验比特的索引地址，确定信源比特流的各个信息比特各自对应的校验比特，并进行编码处理，得到LDPC码。本申请实施例通过分组构造校验矩阵，从而确定针对校验矩阵的索引地址矩阵的方式，解决了现有技术中因持续访问码导致的计算开销，提高了LDPC编码器的效率。 【EN】The embodiment of the application provides a data processing method, a data processing device, a terminal and a storage medium based on an LDPC encoder. The method comprises the following steps: acquiring an information source bit stream to be processed, and determining pre-edited configuration information; determining a target code table among a plurality of pre-stored code tables based on the configuration information; grouping the information source bit stream according to the configuration information, and constructing a target code table into a corresponding check matrix according to a grouping result; determining index addresses corresponding to the groups respectively and aiming at check bits in the check matrix; and determining check bits corresponding to each information bit of the source bit stream according to the index addresses corresponding to the check bits in the check matrix and corresponding to each group, and performing coding processing to obtain the LDPC code. According to the embodiment of the application, the check matrix is constructed in a grouping mode, so that the index address matrix aiming at the check matrix is determined, the calculation cost caused by continuous access codes in the prior art is solved, and the efficiency of the LDPC coder is improved.

摘要：【中文】本申请公开了一种多普勒频偏处理方法、装置及终端。方法包括：基于预设的功率谱估计算法，确定待处理的接收信号的各个采样点各自的功率谱；对接收信号的各个采样点各自的功率谱进行频谱峰值搜索处理，确定接收信号的各个采样点各自对应的谱峰；对接收信号的各个采样点各自对应的谱峰进行平滑滤波处理。本申请现有技术中需要依赖辅助数据或者需要进行符号定时恢复导致的多普勒频偏估计运算量大且准确率低的问题，进而提高了接收机后续对信号的处理精度。 【EN】The application discloses a Doppler frequency offset processing method, a device and a terminal. The method comprises the following steps: determining respective power spectrums of all sampling points of a received signal to be processed based on a preset power spectrum estimation algorithm; carrying out spectrum peak value search processing on respective power spectrums of each sampling point of the received signal, and determining respective corresponding spectrum peaks of each sampling point of the received signal; and carrying out smooth filtering processing on the spectral peaks corresponding to the sampling points of the received signal. The method and the device have the advantages that in the prior art, the problems of large calculation amount and low accuracy of Doppler frequency offset estimation caused by the need of depending on auxiliary data or the need of carrying out symbol timing recovery are solved, and then the subsequent signal processing precision of a receiver is improved.

摘要：【中文】本发明公开了一种耐高温离心风机，其中，包括用于固定连接在电机的机壳上的隔热箱，设置在隔热箱内的隔热层，以及位于所述隔热箱内并用于连接在所述电机的转轴上的风冷轮。通过本方案替代现有技术中的循环水冷却方式，实现在高温的工作温度下稳定传动，具有减小安装尺寸，降低生产成本的优点。 【EN】The invention discloses a high-temperature resistant centrifugal fan which comprises a heat insulation box fixedly connected to a shell of a motor, a heat insulation layer arranged in the heat insulation box, and an air cooling wheel positioned in the heat insulation box and connected to a rotating shaft of the motor. Replace the circulating water cooling mode among the prior art through this scheme, realize stable transmission under the operating temperature of high temperature, have the advantage that reduces mounting dimension, reduction in production cost.

摘要：【中文】公开了一种LDPC码译码器，包括：变量节点模块、校验节点模块、顶层模块、控制模块、桶形移位模块和第一存储模块；其中，所述顶层模块配置有折叠因子、例化并行数和对数似然比LLR信息的输入位宽，所述变量节点模块、校验节点模块和第一存储模块的例化个数等于所述例化并行数，所述控制模块配置为根据所述顶层模块提供的来自外部的译码控制参数控制所述变量节点模块、校验节点模块、第一存储模块和所述桶形移位模块并行完成LDPC码译码。本申请实施例的LDPC码译码器采用参数化的并行度灵活可配置的并行译码架构，可以适合于FPGA实现，并可以支持全部DVB S2标准模式。 【EN】Disclosed is an LDPC code decoder including: the device comprises a variable node module, a check node module, a top layer module, a control module, a barrel-shaped shift module and a first storage module; the top module is configured with an input bit width of folding factors, an instantiated parallel number and log-likelihood ratio (LLR) information, the instantiated numbers of the variable node module, the check node module and the first storage module are equal to the instantiated parallel number, and the control module is configured to control the variable node module, the check node module, the first storage module and the barrel-shaped shift module to complete LDPC code decoding in parallel according to decoding control parameters provided by the top module and coming from the outside. The LDPC code decoder of the embodiment of the application adopts a parameterized parallel decoding architecture with flexible and configurable parallelism, can be suitable for FPGA realization, and can support all DVB S2 standard modes.

摘要：【中文】本申请实施例提供了一种BCH译码器和基于BCH译码器的译码方法，BCH译码器上配置有限域信息，有限域信息包括针对多个域元素的元素存储表及针对多个域元素的索引查询表，该方法包括：依据预定义的伴随式算法以及针对伴随式算法的有限域信息，对BCH译码器接收到的待译码数据进行伴随式计算，得到多个伴随式；基于多个伴随式，并依据预定义的错误位置多项式算法以及针对预定义的错误位置多项式算法的有限域信息，对错误位置多项式进行迭代计算，确定错误图样；依据预定义的钱搜索算法以及针对钱搜索算法的有限域信息，对错误图样进行验证，并依据验证结果对待译码数据进行纠错处理，得到BCH码。本申请实施例利用有限域进行计算提高了译码速度。 【EN】The embodiment of the application provides a BCH decoder and a decoding method based on the BCH decoder, wherein the BCH decoder is configured with finite field information, the finite field information comprises an element storage table aiming at a plurality of field elements and an index query table aiming at the plurality of field elements, and the method comprises the following steps: carrying out syndrome calculation on data to be decoded received by a BCH decoder according to a predefined syndrome algorithm and finite field information aiming at the syndrome algorithm to obtain a plurality of syndromes; based on a plurality of syndromes, carrying out iterative computation on the error position polynomial according to a predefined error position polynomial algorithm and finite field information aiming at the predefined error position polynomial algorithm, and determining an error pattern; and verifying the error pattern according to a predefined chien search algorithm and the finite field information aiming at the chien search algorithm, and performing error correction processing on the data to be decoded according to a verification result to obtain the BCH code. The embodiment of the application utilizes the finite field for calculation, so that the decoding speed is improved.

摘要：【中文】本申请实施例提供了一种基于DVB‑S2系统的帧头检测方法、装置、终端及存储介质。其中方法包括：基于预存帧序列，确定连续多个帧起始位置；依据连续多个所述帧起始位置，确定相应多个待处理段；得到多个所述待处理段各自对应的差分相关值；将多个所述待处理段各自对应的差分相关值与相应的平均功率之比，确定为多个所述待处理段各自对应帧头的差分相关峰均比数据；当任一待处理段对应帧头的差分相关峰均比数据大于预设门限，则将该任一待处理段对应帧头确定为候选帧头，直至得到多个所述候选帧头。本申请实施例联合连续多个帧头以及各自相应的多个导频进行差分相关计算，并通过与平均功率之比的计算不仅提升了性能，还减小了帧头检测的计算量。 【EN】The embodiment of the application provides a frame header detection method, a frame header detection device, a frame header detection terminal and a storage medium based on a DVB-S2 system. The method comprises the following steps: determining a plurality of continuous frame starting positions based on a pre-stored frame sequence; determining a plurality of corresponding segments to be processed according to a plurality of continuous frame initial positions; obtaining difference correlation values corresponding to the sections to be processed respectively; determining the ratio of the differential correlation value corresponding to each of the plurality of sections to be processed to the corresponding average power as differential correlation peak-to-average ratio data of the frame header corresponding to each of the plurality of sections to be processed; and when the difference correlation peak-to-average ratio data of the frame header corresponding to any section to be processed is larger than a preset threshold, determining the frame header corresponding to the section to be processed as a candidate frame header until a plurality of candidate frame headers are obtained. The embodiment of the application combines a plurality of continuous frame headers and a plurality of corresponding pilot frequencies to carry out differential correlation calculation, and not only improves the performance through the calculation of the ratio of the average power to the average power, but also reduces the calculation amount of frame header detection.

摘要：【中文】本发明公开了一种SNR估计方法，其中该SNR估计方法包括将输入信号转变为待估计加噪信号；通过软件仿真来确定待估计加噪信号的切换阈值；通过ECF算法来计算待估计加噪信号的信噪比估计值；将估计值与阈值进行比较：如果估计值小于阈值，则保留估计值；如果估计值不小于阈值，则通过SVR算法来计算待估计加噪信号的信噪比估计值。本发明还公开了一种SNR估计系统。该SNR估计系统和SNR估计方法能够适用于高信噪比和低信噪比范围，估计范围广、精度高。 【EN】The invention discloses an SNR estimation method, wherein the SNR estimation method comprises the steps of converting an input signal into a noise signal to be estimated; determining a switching threshold value of a noise adding signal to be estimated through software simulation; calculating a signal-to-noise ratio estimation value of a noise signal to be estimated through an ECF algorithm; comparing the estimate to a threshold: if the estimated value is less than the threshold value, retaining the estimated value; and if the estimated value is not less than the threshold value, calculating the signal-to-noise ratio estimated value of the noise-added signal to be estimated through an SVR algorithm. The invention also discloses an SNR estimation system. The SNR estimation system and the SNR estimation method can be suitable for the ranges of high signal-to-noise ratio and low signal-to-noise ratio, and are wide in estimation range and high in precision.

摘要：【中文】本申请提供了一种载波频偏估计的实现方法、装置、终端及存储介质。其中方法包括：基于帧同步处理后的输入数据，确定连续的多个帧头；将多个帧头分别与本地预存帧头序列进行共轭相乘运算，得到多个运算结果序列；对多个运算结果序列分别进行自相关计算，确定多个帧头各自对应的多个自相关值；依据多个帧头各自对应的多个自相关值以及预定幅角，确定多个帧头各自对应的相位偏移量；计算平均相位偏移量；根据多帧数据对应的平均相位偏移量，对多个帧头分别对应的数据帧进行相位补偿。本申请实施例综合考虑多帧数据的平均相位偏移量来进行频偏估计的目的，解决了现有技术中依赖单帧数据进行频偏估计导致的频偏估计精度低的问题。 【EN】The application provides a method, a device, a terminal and a storage medium for realizing carrier frequency offset estimation. The method comprises the following steps: determining a plurality of continuous frame headers based on input data subjected to frame synchronization processing; respectively carrying out conjugate multiplication operation on the plurality of frame headers and a locally pre-stored frame header sequence to obtain a plurality of operation result sequences; performing autocorrelation calculation on the plurality of operation result sequences respectively, and determining a plurality of autocorrelation values corresponding to the plurality of frame headers respectively; determining respective phase offsets of the plurality of frame headers according to a plurality of autocorrelation values and a predetermined argument respectively corresponding to the plurality of frame headers; calculating an average phase offset; and according to the average phase offset corresponding to the multi-frame data, performing phase compensation on the data frames corresponding to the plurality of frame headers respectively. The method and the device for estimating the frequency offset comprehensively consider the average phase offset of the multi-frame data to estimate the frequency offset, and solve the problem of low frequency offset estimation precision caused by the fact that single-frame data is relied on to estimate the frequency offset in the prior art.

摘要：【中文】本发明属于双块式轨枕自动生产技术领域，具体是一种双块式轨枕模具拆垛脱模系统。包括设置于汽养护通道出口与脱模区之间的拆垛系统以及设置于脱模区内的脱模系统。拆垛系统包括门式支架、道轨、横梁、升降电机、旋转夹具、锁定装置和压板解除装置，门式支架顶部两侧设置道轨，横梁架设在道轨上，横梁上设置有可以沿横梁移动的升降电机，升降电机通过钢丝绳连接旋转夹具，旋转夹具两端设置有锁定装置，旋转夹具的中轴线位置设置有压板解除装置。脱模系统包括平移桁架、脱模台和缓冲支架，脱模台布设在平移桁架之间，缓冲支架设置在脱模台内侧。本发明结构简单、设计合理且投入成本低，安装布设方便。 【EN】The invention belongs to the technical field of automatic production of double-block sleepers, and particularly relates to a double-block sleeper mould unstacking and demoulding system. Comprises a stack disassembling system arranged between an outlet of a steam curing channel and a demoulding area and a demoulding system arranged in the demoulding area. The unstacking system comprises a door-type support, rails, a cross beam, a lifting motor, a rotary clamp, a locking device and a pressing plate removing device, the rails are arranged on two sides of the top of the door-type support, the cross beam is erected on the rails, the lifting motor capable of moving along the cross beam is arranged on the cross beam, the lifting motor is connected with the rotary clamp through a steel wire rope, the locking device is arranged at two ends of the rotary clamp, and the pressing plate removing device is arranged in the central axis position of the rotary clamp. The demolding system comprises translation trusses, demolding tables and buffering supports, the demolding tables are arranged among the translation trusses, and the buffering supports are arranged on the inner sides of the demolding tables. The invention has simple structure, reasonable design, low investment cost and convenient installation and layout.