当前查询到132条专利与查询词 "Wang Jiangwei"相关,搜索用时0.9218888秒!排序方式:
发明专利:66实用新型: 59外观设计: 7
66 条,当前第 1-10 条 下一页 最后一页 返回搜索页
申请号:201911037347.2 公开号:CN110907926A 主分类号:G01S13/06
申请人:【中文】长江大学【EN】Yangtze University 申请日:2019.10.29 公开日:2020.03.24
摘要:【中文】本发明提出一种基于传播算子的双基地EMVS‑MIMO雷达快速目标定位算法及装置,所述算法包括:构建虚拟方向矩阵以及接收阵列数据匹配滤波后的协方差矩阵;分别对所述虚拟方向矩阵和协方差矩阵进行分块,构造传播算子并估计信号子空间;根据所述信号子空间,利用阵列整体的旋转不变特性获得俯仰角的估计,利用矢量叉乘的性质获得方位角的估计;利用最小二乘法获得极化角的估计。本发明所提出的算法可提高定位精度、算法复杂度低、可快速定位。 【EN】The invention provides a bistatic EMVS-MIMO radar rapid target positioning algorithm and a device based on a propagation operator, wherein the algorithm comprises the following steps: constructing a virtual direction matrix and a covariance matrix after receiving array data matching and filtering; partitioning the virtual direction matrix and the covariance matrix respectively, constructing a propagation operator and estimating a signal subspace; according to the signal subspace, obtaining estimation of a pitch angle by utilizing the rotation invariant characteristic of the whole array, and obtaining estimation of an azimuth angle by utilizing the property of vector cross multiplication; an estimate of the polarization angle is obtained using a least squares method. The algorithm provided by the invention can improve the positioning precision, has low algorithm complexity and can realize quick positioning.
详细信息 下载全文

申请号:201911037437.1 公开号:CN110907923A 主分类号:G01S13/02
申请人:【中文】长江大学【EN】Yangtze University 申请日:2019.10.29 公开日:2020.03.24
摘要:【中文】本发明公开一种基于平行因子算法的双基地EMVS‑MIMO雷达角度估计算法及装置,所述算法包括:根据匹配滤波后的阵列信号模型构建三阶平行因子张量模型;对所述三阶平行因子张量模型进行平行因子分解,得到因子矩阵的估计值;根据因子矩阵的估计值,采用ESPRIT技术获得对方位角的估计,利用矢量叉乘的性质获得俯仰角的估计;利用最小二乘技术获得二维极化角的估计。本发明所提算法可以获得低计算复杂度、高精度、自动配对的二维参数估计。 【EN】The invention discloses a bistatic EMVS-MIMO radar angle estimation algorithm and a device based on a parallel factor algorithm, wherein the algorithm comprises the following steps: constructing a third-order parallel factor tensor model according to the array signal model after the matched filtering; carrying out parallel factorization on the third-order parallel factor tensor model to obtain an estimated value of a factor matrix; according to the estimated value of the factor matrix, an ESPRIT technology is adopted to obtain the estimation of the azimuth angle, and the estimation of the pitch angle is obtained by utilizing the property of vector cross multiplication; an estimate of the two-dimensional polarization angle is obtained using a least squares technique. The algorithm provided by the invention can obtain two-dimensional parameter estimation with low calculation complexity, high precision and automatic pairing.
详细信息 下载全文

申请号:201911285960.6 公开号:CN111031044A 主分类号:H04L29/06
摘要:【中文】本申请公开了一种报文解析硬件装置,包括报文获取模块、报文重组模块和多个解析模块,每个解析模块对应各自的消息头标志,其中:报文获取模块获取网络报文;多个解析模块同时在网络报文中查找对应的消息头标志并进行报文解析,得到各自的报文解析结果;报文重组模块将多个报文解析结果按照预设格式重组后输出。与逐一解析每个消息头标志对应的报文消息不同,本申请中多个解析模块同时对网络报文进行报文解析并得到报文解析结果,不需进行单线等待,处理时延大幅下降,明显提高了对网络报文的解析速度,同时本申请中网络报文中出现的错误不会影响后续报文的解析,具有更高的系统容错性。本申请还相应公开了一种具有相同有益效果的报文解析方法。 【EN】The application discloses a message analysis hardware device, which comprises a message acquisition module, a message recombination module and a plurality of analysis modules, wherein each analysis module corresponds to a respective message header marker, wherein: a message acquisition module acquires a network message; a plurality of analysis modules simultaneously search corresponding message header marks in the network messages and analyze the messages to obtain respective message analysis results; and the message restructuring module restructures the message analysis results according to a preset format and outputs the message analysis results. Different from the one-by-one analysis of the message corresponding to each message header mark, the plurality of analysis modules simultaneously carry out message analysis on the network message and obtain a message analysis result, single-line waiting is not needed, the processing delay is greatly reduced, the analysis speed of the network message is obviously improved, meanwhile, errors in the network message do not influence the analysis of subsequent messages, and the method has higher system fault tolerance. The application also correspondingly discloses a message analysis method with the same beneficial effect.
详细信息 下载全文

申请号:201911287827.4 公开号:CN111045963A 主分类号:G06F13/16
摘要:【中文】本发明涉及了一种高位宽总线读写的方法及装置,其中该方法包括:根据数据传输通道的数量将内存划分成多个分区;根据内存大小和数据传输通道的数量确定第一数据位宽和第二数据位宽;响应于接收到用户发出的基于高位宽总线协议的写指令,将单位时钟周期内以所述第一数据位宽接收的数据按照第二数据位宽分别写入多个分区;响应于接收到用户发出的基于高位宽总线协议的读指令,将单位时钟周期内以第二数据位宽从多个分区读取的数据以第一数据位宽输出。利用本发明的实施例在大大降低了用户设计和验证内存控制系统的复杂度的前提下,实现了同时读写多块子内存,减小算法在FPGA上实现硬件加速时,内存访问瓶颈。 【EN】The invention relates to a method and a device for reading and writing a high-bit-width bus, wherein the method comprises the following steps: dividing the memory into a plurality of partitions according to the number of the data transmission channels; determining a first data bit width and a second data bit width according to the size of the memory and the number of data transmission channels; in response to receiving a write instruction based on a high bit width bus protocol sent by a user, respectively writing data received in a unit clock cycle by using the first data bit width into a plurality of partitions according to a second data bit width; and in response to receiving a read instruction based on a high bit width bus protocol sent by a user, outputting the data read from the plurality of partitions in the unit clock cycle in the second data bit width in the first data bit width. The embodiment of the invention realizes the simultaneous reading and writing of a plurality of sub memories on the premise of greatly reducing the complexity of designing and verifying the memory control system by a user, and reduces the memory access bottleneck when the algorithm realizes hardware acceleration on the FPGA.
详细信息 下载全文

申请号:202010031268.7 公开号:CN111262917A 主分类号:H04L29/08
摘要:【中文】本发明实施例公开了一种基于FPGA云平台的远端数据搬移装置和方法,装置包括服务器、交换机和FPGA加速卡,所述装置包括多个FPGA加速卡,所述服务器将待加速的数据通过交换机传输给所述FPGA加速卡,所述FPGA加速卡用于对数据进行一次和/或二次加速,所述FPGA加速卡用于对加速后的数据进行搬移;方法包括:待加速数据从服务器上通过交换机传输到FPGA加速卡,FPGA加速卡对待加速数据进行一次和/或二次加速,FPGA加速卡对加速后的数据进行搬移。本发明通过FPGA加速卡上iRDMA定义的读写指令、加速单元FAU和MAC接口,解决了在FPGA云平台下,JBOF拓扑中FPGA板卡间进行数据的加速和搬移的问题。 【EN】The embodiment of the invention discloses a far-end data moving device and a far-end data moving method based on an FPGA cloud platform, wherein the device comprises a server, a switch and an FPGA acceleration card, the device comprises a plurality of FPGA acceleration cards, the server transmits data to be accelerated to the FPGA acceleration card through the switch, the FPGA acceleration card is used for carrying out primary and/or secondary acceleration on the data, and the FPGA acceleration card is used for moving the accelerated data; the method comprises the following steps: and the data to be accelerated is transmitted to the FPGA acceleration card from the server through the switch, the FPGA acceleration card performs primary and/or secondary acceleration on the data to be accelerated, and the FPGA acceleration card moves the accelerated data. According to the invention, through the read-write command defined by iRDMA on the FPGA acceleration card, the acceleration unit FAU and the MAC interface, the problem of data acceleration and moving among FPGA board cards in JBOF topology under the FPGA cloud platform is solved.
详细信息 下载全文

申请号:201911005256.0 公开号:CN110915843A 主分类号:A21C9/00
申请人:【中文】上海乔翊娅食品有限公司【EN】Shanghai Joe Yiya Food Co. Ltd. 申请日:2019.10.22 公开日:2020.03.27
摘要:【中文】本发明提出了马卡龙糕点挤料装置,该挤料装置由硅胶制成,所述挤料装置包括:形成有椭圆形腔室的左挤压部(1),其左端部设置有左出料嘴;形成有椭圆形腔室的右挤压部(2),其右端部设置有与左出料嘴共轴布置的右进料嘴;用于连通左挤压部、右挤压部的中间连通体(3);所述右进料嘴通过柔性连接管(23)连接于第一原料供给系统以及第二原料供给系统。该装置能够避免挤料过程中出现漏料问题,且工作效率更高。 【EN】The invention provides a macarons cake extruding device, which is made of silica gel and comprises: a left extrusion part (1) with an oval cavity is formed, and the left end part of the left extrusion part is provided with a left discharge nozzle; a right extrusion part (2) with an oval cavity is formed, and the right end part of the right extrusion part is provided with a right feeding nozzle which is coaxially arranged with the left discharging nozzle; a middle communicating body (3) for communicating the left extrusion part and the right extrusion part; the right feeding nozzle is connected to the first raw material supply system and the second raw material supply system through a flexible connecting pipe (23). The device can avoid the crowded material in-process to appear leaking the material problem, and work efficiency is higher.
详细信息 下载全文

申请号:201911345956.4 公开号:CN111025520A 主分类号:G02B7/04
摘要:【中文】本发明公开了一种适用不同镜头的通用调焦环,包括调焦环本体,调焦环本体的底部滑动连接有调焦模组,调焦模组包括若干圈直径依次增加的调焦模块,调焦模块包括若干个呈环形阵列的活动杆;本发明还公开了一种适用不同镜头的通用调焦环的实现方法。本发明细化了调焦结构,通过若干圈环形阵列的活动杆组成一个整体的调焦花瓣,从而可以适应不同的镜头花瓣形状和数量,从而实现不同镜头调焦的通用;本发明可以减少治具成本,通用于不同镜头调焦,切换使用灵活方便,容错率低,便于保养,减少使用难度和提高使用效率。 【EN】The invention discloses a universal focusing ring suitable for different lenses, which comprises a focusing ring body, wherein the bottom of the focusing ring body is connected with a focusing module in a sliding manner, the focusing module comprises a plurality of circles of focusing modules with the diameters sequentially increased, and each focusing module comprises a plurality of movable rods in an annular array; the invention also discloses a method for realizing the universal focusing ring suitable for different lenses. The invention refines the focusing structure, and forms an integral focusing petal by a plurality of circles of movable rods of the annular array, thereby being suitable for different shapes and numbers of lens petals and realizing the universality of focusing of different lenses; the invention can reduce the cost of the jig, is universal for focusing different lenses, is flexible and convenient to switch and use, has low fault-tolerant rate, is convenient to maintain, reduces the use difficulty and improves the use efficiency.
详细信息 下载全文

申请号:201911020955.2 公开号:CN110963097A 主分类号:B65B1/32
申请人:【中文】上海乔翊娅食品有限公司【EN】SHANGHAI QIAOYIYA FOOD Co.,Ltd. 申请日:2019.10.25 公开日:2020.04.07
摘要:【中文】本发明提出了一种食品包装进料装置,包括箱体、进料筒、伸缩套筒、上调节板、下调节板、浮动球体、供气系统、振动器和体重秤;下调节板、上调节板和进料筒自箱体的顶部由下至上依次设置;下调节板、上调节板和进料筒均与该箱体的内腔连通;下调节板固定在进料筒上;上调节板固定在下调节板上;下调节板上开设第一浮动孔;下调节板上开设气道;气道连通第一浮动孔;供气系统固定在下调节板上并连通气道;浮动球体置于第一浮动孔内;上调节板上开设与第一浮动孔连通的第二浮动孔;第二浮动孔的直径小于浮动球体的直径。本发明通过上调节板、下调节板、进料筒、伸缩套筒和浮动球体的配合,将进料筒和箱体分离,提高了称重精度。 【EN】The invention provides a food packaging feeding device, which comprises a box body, a feeding cylinder, a telescopic sleeve, an upper adjusting plate, a lower adjusting plate, a floating ball body, an air supply system, a vibrator and a weight scale, wherein the box body is provided with a plurality of through holes; the lower adjusting plate, the upper adjusting plate and the feeding cylinder are sequentially arranged from bottom to top from the top of the box body; the lower adjusting plate, the upper adjusting plate and the feeding cylinder are communicated with the inner cavity of the box body; the lower adjusting plate is fixed on the feeding cylinder; the upper adjusting plate is fixed on the lower adjusting plate; the lower adjusting plate is provided with a first floating hole; an air passage is formed in the lower adjusting plate; the air passage is communicated with the first floating hole; the air supply system is fixed on the lower adjusting plate and is connected with the air passage; the floating ball body is arranged in the first floating hole; the upper adjusting plate is provided with a second floating hole communicated with the first floating hole; the diameter of the second floating hole is smaller than that of the floating ball body. According to the invention, the feeding cylinder is separated from the box body through the matching of the upper adjusting plate, the lower adjusting plate, the feeding cylinder, the telescopic sleeve and the floating ball body, so that the weighing precision is improved.
详细信息 下载全文

申请号:201911243266.8 公开号:CN111046002A 主分类号:G06F16/17
摘要:【中文】本申请提供一种图数据的压缩方法,包括:获取原始图数据并确定原始图数据中每条边的节点对;将节点对中的同一源节点按照预设分组规则分组;每个分组中保留一个源节点;根据每个分组的组类型存入对应的FIFO;对源节点的源节点数据和目的节点的目的节点数据添加标签;对FIFO进行轮询并存储,得到压缩图数据。本申请使得对应目的节点数量不同的源节点采用不同的压缩率,在同一分组内仅保留一个源节点,无需存储重复的源节点。可以支持图数据大规模并行解压缩,大幅增加图数据处理带宽。本申请还提供一种图计算系统的数据压缩系统、计算机可读存储介质和一种数据压缩终端,具有上述有益效果。 【EN】The application provides a method for compressing graph data, which comprises the following steps: acquiring original graph data and determining node pairs of each edge in the original graph data; grouping the same source node in the node pair according to a preset grouping rule; one source node is reserved in each packet; storing the packet into a corresponding FIFO according to the group type of each packet; adding labels to source node data of a source node and destination node data of a destination node; and polling and storing the FIFO to obtain the compression map data. According to the method and the device, the source nodes corresponding to different target nodes in number adopt different compression rates, only one source node is reserved in the same group, and repeated source nodes do not need to be stored. The method can support large-scale parallel decompression of the graph data, and greatly increase the processing bandwidth of the graph data. The application also provides a data compression system of the graph calculation system, a computer readable storage medium and a data compression terminal, which have the beneficial effects.
详细信息 下载全文

申请号:202010001574.6 公开号:CN111044159A 主分类号:G01J5/24
摘要:【中文】本发明公开了一种室温太赫兹焦平面阵列偏压调节电路及其使用方法,该电路包括顺次连接的PC端、ASIC芯片、D/A转换器、第一二阶低通滤波电路、同相放大电路、第二二阶低通滤波电路和室温太赫兹焦平面阵列,PC端通过USB串口线与所述ASIC芯片连接。在PC端软件中输入偏压指令,在ASIC芯片的控制下,将对应偏压指令的十进制数值计算为对应的二进制数值,通过D/A转换器,将输入的二进制数字信号转化为偏压指令模拟信号,该偏压指令模拟信号输出至第一二阶低通滤波电路滤波后进入同相运算放大器进行放大处理,再经过第二二阶低通滤波器进行滤波降噪之后输入给室温太赫兹焦平面阵列。该方案提供一种可调节的偏置电压设计方法,且偏压设计电路精度高、噪声低。 【EN】The invention discloses a room temperature terahertz focal plane array bias voltage adjusting circuit and a use method thereof. A bias instruction is input into PC end software, a decimal numerical value corresponding to the bias instruction is calculated into a corresponding binary numerical value under the control of an ASIC chip, an input binary digital signal is converted into a bias instruction analog signal through a D/A converter, the bias instruction analog signal is output to a first second-order low-pass filter circuit to be filtered, then enters an in-phase operational amplifier to be amplified, is filtered and denoised through a second-order low-pass filter, and then is input to a room temperature terahertz focal plane array. The scheme provides an adjustable bias voltage design method, and the bias voltage design circuit is high in precision and low in noise.
详细信息 下载全文

66 条,当前第 1-10 条 下一页 最后一页 返回搜索页