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1:
[发明]
【中文】3D存储器件及其制造方法 【EN】3D memory device and method of manufacturing the same
申请号:
202010001944.6
公开号:CN111180454A 主分类号:H01L27/11524
申请人:
【中文】长江存储科技有限责任公司【EN】Yangtze Memory Technologies Co.,Ltd.
申请日:2020.01.02 公开日:2020.05.19
发明人:
【中文】李思晢
;
周玉婷
;
汤召辉
;
张磊
;
曾凡清【EN】Li Sizhe
;
Zhou Yuting
;
Tang Zhaohui
;
Zhang Lei
;
Zeng Fanqing
摘要:【中文】本申请公开了一种3D存储器件及其制造方法。该制造方法包括:在衬底上形成第一叠层结构,包括交替堆叠的多个层间绝缘层与栅极导体层,第一叠层结构具有第一台阶结构;形成覆盖第一台阶结构与衬底的第一填充层;形成覆盖第一叠层结构的第二叠层结构,包括交替堆叠的多个层间绝缘层与栅极导体层,第二叠层结构具有第二台阶结构;形成多个第一虚拟沟道柱,第一虚拟沟道柱的至少部分位于第二台阶结构中,至少一个第一虚拟沟道柱的顶面为第二台阶结构的台阶面。该制造方法通过将虚拟沟道柱的顶面与台阶结构的台阶面共面,解决了器件平整度差的问题。 【EN】The application discloses a 3D memory device and a method of manufacturing the same. The manufacturing method comprises the following steps: forming a first stacked structure including a plurality of interlayer insulating layers and gate conductor layers stacked alternately on a substrate, the first stacked structure having a first step structure; forming a first filling layer covering the first step structure and the substrate; forming a second stacked structure covering the first stacked structure, the second stacked structure including a plurality of interlayer insulating layers and gate conductor layers stacked alternately, the second stacked structure having a second step structure; and forming a plurality of first dummy channel columns, wherein at least part of the first dummy channel columns are positioned in the second step structure, and the top surface of at least one first dummy channel column is the step surface of the second step structure. The manufacturing method solves the problem of poor flatness of the device by making the top surface of the virtual channel column and the step surface of the step structure coplanar.
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2:
[发明]
【中文】探针卡装置及其调节式探针 【EN】Probe card device and adjustable probe thereof
申请号:
201811391340.6
公开号:CN111208327A 主分类号:G01R1/073
申请人:
【中文】中华精测科技股份有限公司【EN】CHUNGHWA PRECISION TEST TECH. Co.,Ltd.
申请日:2018.11.21 公开日:2020.05.29
发明人:
【中文】李文聪
;
谢开杰
;
曾照晖
;
王宪瑜【EN】Li Wencong
;
Xie Kaijie
;
Zeng Zhaohui
;
Wang Xianyu
摘要:【中文】本发明公开一种探针卡装置及其调节式探针。探针卡装置包含间隔设置的上导板单元与下导板单元、夹持于上导板单元与下导板单元的间隔板、阻抗调节件、及多个导电探针。上导板单元包含彼此间隔设置的第一导板与第二导板,第一导板形成贯孔,第二导板形成线路层。阻抗调节件设置于第二导板、并电性耦接于线路层。每个导电探针穿过上导板单元、间隔板、及下导板单元。至少一个所述导电探针定义为调节式探针,其包含有穿出上导板单元的上接触段及相连于上接触段的延伸臂。延伸臂穿过贯孔、并抵接于线路层,以使调节式探针电性连接于阻抗调节件。据此,调节式探针能通过延伸臂来与阻抗调节件进行电性耦接,进而达到降低电源阻抗的效果。 【EN】The invention discloses a probe card device and an adjustable probe thereof. The probe card device comprises an upper guide plate unit and a lower guide plate unit which are arranged at intervals, a spacing plate clamped between the upper guide plate unit and the lower guide plate unit, an impedance adjusting piece and a plurality of conductive probes. The upper guide plate unit comprises a first guide plate and a second guide plate which are arranged at intervals, the first guide plate forms a through hole, and the second guide plate forms a circuit layer. The impedance adjusting part is arranged on the second guide plate and electrically coupled to the circuit layer. Each conductive probe passes through the upper guide plate unit, the partition plate, and the lower guide plate unit. At least one of the conductive probes is defined as a conditioning probe, which includes an upper contact section extending through the upper guide plate unit and an extension arm connected to the upper contact section. The extension arm penetrates through the through hole and is abutted against the circuit layer, so that the adjustable probe is electrically connected with the impedance adjusting piece. Accordingly, the adjustable probe can be electrically coupled with the impedance adjusting part through the extension arm, and the effect of reducing the power supply impedance is achieved.
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3:
[发明]
【中文】探针卡装置及其探针座 【EN】Probe card device and probe seat thereof
申请号:
201811435513.X
公开号:CN111239449A 主分类号:G01R1/073
申请人:
【中文】中华精测科技股份有限公司【EN】CHUNGHWA PRECISION TEST TECH. Co.,Ltd.
申请日:2018.11.28 公开日:2020.06.05
发明人:
【中文】李文聪
;
谢开杰
;
曾照晖
;
王宪瑜【EN】Li Wencong
;
Xie Kaijie
;
Zeng Zhaohui
;
Wang Xianyu
摘要:【中文】本发明公开一种探针卡装置及其探针座,所述探针座包含间隔设置的上导板单元与下导板单元、间隔板及阻抗调节件。上导板单元包含一第一导板、与第一导板间隔设置的第二导板及设置于第二导板且远离第一导板的可挠性载板。所述可挠性载板形成有多个通孔及一线路层。阻抗调节件设置于可挠性载板,并电性耦接于线路层。间隔板夹持于可挠性载板与下导板单元之间。所述线路层包含有镀设于至少一个通孔内的至少一个电镀壁,并且设置有至少一个所述电镀壁的所述可挠性载板部位能接收一外力而与第二导板分离。据此,探针座设有能与第二导板分离的可挠性载板,使穿设于探针座的部分导电探针能通过可挠性载板电性耦接于阻抗调节件,达到降低阻抗效果。 【EN】The invention discloses a probe card device and a probe seat thereof. The upper guide plate unit comprises a first guide plate, a second guide plate arranged at an interval with the first guide plate, and a flexible carrier plate arranged on the second guide plate and far away from the first guide plate. The flexible carrier plate is formed with a plurality of through holes and a circuit layer. The impedance adjusting part is arranged on the flexible carrier plate and is electrically coupled with the circuit layer. The spacing plate is clamped between the flexible carrier plate and the lower guide plate unit. The circuit layer comprises at least one electroplating wall plated in at least one through hole, and the flexible carrier plate part provided with at least one electroplating wall can receive an external force to be separated from the second guide plate. Therefore, the probe seat is provided with the flexible carrier plate which can be separated from the second guide plate, so that part of the conductive probes penetrating through the probe seat can be electrically coupled with the impedance adjusting piece through the flexible carrier plate, and the impedance reducing effect is achieved.
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4:
[发明]
【中文】LED芯片结构及其制作方法 【EN】LED chip structure and manufacturing method thereof
申请号:
202010031515.3
公开号:CN111200046A 主分类号:H01L33/46
申请人:
【中文】广东省半导体产业技术研究院【EN】GUANGDONG INSTITUTE OF SEMICONDUCTOR INDUSTRIAL TECHNOLOGY
申请日:2020.01.13 公开日:2020.05.26
发明人:
【中文】李祈昕
;
刘宁炀
;
陈志涛
;
李叶林
;
曾昭烩
;
任远
;
曾巧玉【EN】Li Qixin
;
Liu Ningyang
;
Chen Zhitao
;
Li Yelin
;
Zeng Zhaohui
;
Ren Yuan
;
Zeng Qiaoyu
摘要:【中文】本发明的实施例提供了一种LED芯片结构及其制作方法,涉及半导体技术领域。本发明实施例的LED芯片结构的制作方法包括在金属阻挡层制作前,对金属反射镜的表面进行平滑化处理,再沉积制作金属阻挡层。然后,对金属反射镜和金属阻挡层的组合结构进行退火处理。通过此制作方法,在保证反射镜良好性能的前提下,提高阻挡层金属的沉积质量,减小金属阻挡层的应力作用,并显著简化工艺调整过程,增强工艺的可移植性和兼容性,提升了LED芯片结构的可靠性。本发明实施例提供的LED芯片结构通过本发明实施例的制作方法制得,其金属阻挡层和金属反射镜的结合性好,因此具有较高的可靠性。 【EN】The embodiment of the invention provides an LED chip structure and a manufacturing method thereof, relating to the technical field of semiconductors. The manufacturing method of the LED chip structure comprises the steps of carrying out smoothing treatment on the surface of the metal reflector before the metal barrier layer is manufactured, and then depositing and manufacturing the metal barrier layer. Then, the combined structure of the metal reflector and the metal barrier layer is annealed. By the manufacturing method, on the premise of ensuring good performance of the reflector, the deposition quality of the barrier metal is improved, the stress effect of the metal barrier layer is reduced, the process adjustment process is obviously simplified, the transportability and compatibility of the process are enhanced, and the reliability of the LED chip structure is improved. The LED chip structure provided by the embodiment of the invention is prepared by the manufacturing method of the embodiment of the invention, and the metal barrier layer and the metal reflector are good in combination, so that the reliability is higher.
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5:
[发明]
【中文】3D存储器件及其制造方法 【EN】3D memory device and method of manufacturing the same
申请号:
202010001957.3
公开号:CN111180458A 主分类号:H01L27/11556
申请人:
【中文】长江存储科技有限责任公司【EN】Yangtze Memory Technologies Co.,Ltd.
申请日:2020.01.02 公开日:2020.05.19
发明人:
【中文】李思晢
;
周玉婷
;
汤召辉
;
张磊
;
董明
;
曾凡清【EN】Li Sizhe
;
Zhou Yuting
;
Tang Zhaohui
;
Zhang Lei
;
Dong Ming
;
Zeng Fanqing
摘要:【中文】本申请公开了一种3D存储器件及其制造方法。该3D存储器件的制造方法包括:在具有外围电路区的衬底上形成隔离层;在部分隔离层上形成与外围电路区的位置对应的阻挡层;在隔离层上形成叠层结构,包括交替堆叠的牺牲层与层间绝缘层;形成至少覆盖阻挡层的平坦层;形成贯穿栅叠层结构与隔离层的多个沟道柱;将牺牲层替换为栅极导体层;以及形成穿过平坦层的第一导电通道,其中,形成第一导电通道的步骤包括:刻蚀平坦层形成第一导电通孔,刻蚀在到达阻挡层时停止;以及在第一导电通孔中填充导电材料。该3D存储器件的制造方法通过在对应外围电路区的隔离层上形成阻挡层,在刻蚀平坦层形成第一导电通孔时,阻挡层防止了下方的隔离层与衬底被刻蚀剂损伤。 【EN】The application discloses a 3D memory device and a method of manufacturing the same. The method of manufacturing the 3D memory device includes: forming an isolation layer on a substrate having a peripheral circuit region; forming a barrier layer corresponding to the position of the peripheral circuit region on part of the isolation layer; forming a stacked structure including alternately stacked sacrificial layers and interlayer insulating layers on the isolation layer; forming a flat layer at least covering the barrier layer; forming a plurality of channel columns penetrating through the gate stack structure and the isolation layer; replacing the sacrificial layer with a gate conductor layer; and forming a first conductive via through the planarization layer, wherein forming the first conductive via comprises: etching the flat layer to form a first conductive through hole, and stopping etching when the first conductive through hole reaches the barrier layer; and filling a conductive material in the first conductive via. According to the manufacturing method of the 3D memory device, the barrier layer is formed on the isolation layer corresponding to the peripheral circuit area, and when the first conductive through hole is formed by etching the flat layer, the barrier layer prevents the isolation layer and the substrate below from being damaged by an etchant.
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6:
[发明]
【中文】一种台阶区形成方法和一种半导体器件的制造方法 【EN】Method for forming step region and method for manufacturing semiconductor device
申请号:
202010000482.6
公开号:CN111162081A 主分类号:H01L27/11524
申请人:
【中文】长江存储科技有限责任公司【EN】Yangtze Memory Technologies Co.,Ltd.
申请日:2020.01.02 公开日:2020.05.15
发明人:
【中文】阳涵
;
曾凡清
;
董明
;
张磊
;
周玉婷
;
汤召辉【EN】Yang Han
;
Zeng Fanqing
;
Dong Ming
;
Zhang Lei
;
Zhou Yuting
;
Tang Zhaohui
摘要:【中文】本发明提供一种台阶区形成方法和一种半导体器件的制造方法,用于在基底上蚀刻成形N个连续的基底台阶,设定N为大于2的自然数,且待成形基底台阶自下而上依次为第1基底台阶至第N基底台阶,形成方法包括以下过程:在基底表面上设置光阻胶层;在光阻胶层上制作N‑1个光阻胶台阶,N‑1个光阻胶台阶一一对应覆盖至第2基底台阶至第N基底台阶待成形区域基底表面上的光阻胶台阶;修剪去除光阻胶台阶的第i级台阶;基于修剪后的光阻胶台阶对基底进行蚀刻;按i值由小到大的顺序循环执行修剪和蚀刻步骤,直至基底上形成N个基底台阶。本发明方法光阻胶层修剪量仅为每层台阶光阻胶层厚,降低了光阻胶的层厚、减少光阻胶层形变、提升生产效率。 【EN】The invention provides a step area forming method and a manufacturing method of a semiconductor device, which are used for etching and forming N continuous substrate steps on a substrate, wherein N is set to be a natural number larger than 2, and the substrate steps to be formed are a 1 st substrate step to an Nth substrate step from bottom to top in sequence, and the forming method comprises the following steps: arranging a photoresist layer on the surface of the substrate; manufacturing N-1 photoresist steps on the photoresist layer, wherein the N-1 photoresist steps are correspondingly covered on the substrate surfaces of the areas to be formed from the No. 2 substrate step to the No. N substrate step one by one; trimming and removing the ith step of the photoresist step; etching the substrate based on the trimmed photoresist steps; and circularly executing the trimming and etching steps according to the sequence of the i value from small to large until N substrate steps are formed on the substrate. The trimming amount of the photoresist adhesive layer is only the thickness of each step of photoresist adhesive layer, so that the thickness of the photoresist adhesive layer is reduced, the deformation of the photoresist adhesive layer is reduced, and the production efficiency is improved.
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7:
[发明]
【中文】一种LED发光器件及其制备方法、辐照处理装置 【EN】LED light-emitting device, preparation method thereof and irradiation treatment device
申请号:
201911276990.0
公开号:CN111105999A 主分类号:H01L21/268
申请人:
【中文】广东省半导体产业技术研究院【EN】GUANGDONG INSTITUTE OF SEMICONDUCTOR INDUSTRIAL TECHNOLOGY
申请日:2019.12.12 公开日:2020.05.05
发明人:
【中文】刘宁炀
;
王君君
;
陈志涛
;
曾昭烩
;
李祈昕
;
李叶林
;
董斌【EN】Liu Ningyang
;
Wang Junjun
;
Chen Zhitao
;
Zeng Zhaohui
;
Li Qixin
;
Li Yelin
;
Dong Bin
摘要:【中文】本发明公开了一种LED发光器件及其制备方法、辐照处理装置,涉及半导体器件制备技术领域,包括在衬底上依次生长外延结构层并制备电极,以形成LED芯片;采用辐照源对LED芯片进行辐照处理,辐照能量范围在0~50MeV之间,辐照剂量范围在0~200Mrad‑Si;对辐照处理后的LED芯片进行封装,得到LED发光器件。通过在未对LED芯片进行整体封装的阶段,对LED芯片进行辐照处理,能够提高LED发光器件中P型接触层的载流子浓度,提高LED发光器件的空穴载流子注入效率并降低工作电压,由于辐照能够打断局部化学键,化学势引起的价带变化能够使得有源区内非辐射复合中心数量减少,从而提高LED发光器件的辐射复合效率,进而使得采用这种方法制备的LED发光器件的发光效率得到提升。 【EN】The invention discloses an LED light-emitting device, a preparation method thereof and an irradiation treatment device, relating to the technical field of semiconductor device preparation, comprising the steps of growing an epitaxial structure layer on a substrate in sequence and preparing electrodes to form an LED chip; performing irradiation treatment on the LED chip by using an irradiation source, wherein the irradiation energy range is 0-50MeV, and the irradiation dose range is 0-200 Mrad-Si; and packaging the LED chip after the irradiation treatment to obtain the LED light-emitting device. The irradiation treatment is carried out on the LED chip at the stage of not carrying out integral encapsulation on the LED chip, the carrier concentration of a P-type contact layer in the LED light-emitting device can be improved, the hole carrier injection efficiency of the LED light-emitting device is improved, the working voltage is reduced, the local chemical bond can be broken through irradiation, the number of non-radiative recombination centers in an active region can be reduced due to the change of a valence band caused by chemical potential, the radiation recombination efficiency of the LED light-emitting device is improved, and the luminous efficiency of the LED light-emitting device prepared by the method is improved.
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8:
[发明]
【中文】基于快速全加器的全数字锁相环及锁相控制方法 【EN】All-digital phase-locked loop based on fast full adder and phase-locked control method
申请号:
201911409101.3
公开号:CN111030687A 主分类号:H03L7/099
申请人:
【中文】南华大学【EN】University OF SOUTH CHINA
申请日:2019.12.31 公开日:2020.04.17
发明人:
【中文】单长虹
;
杨檬玮
;
董招辉
;
曾玖贞
;
赵宇红
;
陈忠泽
;
王丽君
;
朱卫华【EN】Shan Changhong
;
Yang Mengwei
;
Dong Zhaohui
;
Zeng Jiuzhen
;
Zhao Yuhong
;
Chen Zhongze
;
Wang Lijun
;
Zhu Weihua
摘要:【中文】基于快速全加器的全数字锁相环及锁相控制方法,所述的全数字锁相环包括数字鉴相器模块、数字环路滤波器模块、缓冲寄存器和数控振荡器模块。数字环路滤波器模块和数控振荡器模块均包括快速全加器,快速全加器包括多个超前进位加法器,多个超前进位加法器之间采用内部超前进位级联的方式进行连接,采用自顶向下的方式、利用电子设计自动化技术完成各个模块电路的设计。通过采用基于快速全加器的方法对全数字锁相环的电路结构进行优化,拓宽了全数字锁相环电路的锁相范围,提高了锁相频率。本发明具有锁相速度快、锁定频率范围宽、功耗低等优点,将其作为锁相电路模块嵌入到不同的系统芯片中,对电子器件性能提升和半导体工艺技术发展具有重要意义。 【EN】The all-digital phase-locked loop comprises a digital phase discriminator module, a digital loop filter module, a buffer register and a numerically controlled oscillator module. The digital loop filter module and the numerical control oscillator module respectively comprise a quick full adder, the quick full adder comprises a plurality of carry look ahead adders, the plurality of carry look ahead adders are connected in an internal carry look ahead cascade mode, and the design of each module circuit is completed in a top-down mode by utilizing an electronic design automation technology. The circuit structure of the all-digital phase-locked loop is optimized by adopting a method based on a fast full adder, so that the phase-locking range of the all-digital phase-locked loop circuit is expanded, and the phase-locking frequency is improved. The invention has the advantages of high phase locking speed, wide locking frequency range, low power consumption and the like, and has important significance for improving the performance of electronic devices and developing semiconductor process technology by being embedded into different system chips as a phase locking circuit module.
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9:
[发明]
【中文】一种芯片制备方法与待剥离芯片结构 【EN】Chip preparation method and chip structure to be stripped
申请号:
201911375024.4
公开号:CN111048635A 主分类号:H01L33/00
申请人:
【中文】广东省半导体产业技术研究院【EN】GUANGDONG INSTITUTE OF SEMICONDUCTOR INDUSTRIAL TECHNOLOGY
申请日:2019.12.27 公开日:2020.04.21
发明人:
【中文】张康
;
赵维
;
贺龙飞
;
何晨光
;
吴华龙
;
曾昭烩
;
廖乾光
;
陈志涛【EN】Zhang Kang
;
Zhao Wei
;
He Longfei
;
He Chenguang
;
Wu Hualong
;
Zeng Zhaohui
;
Liao Qianguang
;
Chen Zhitao
摘要:【中文】本申请提供了一种芯片制备方法与待剥离芯片结构,涉及半导体技术领域。首先提供一衬底,然后沿衬底制作掩膜层,其中,掩膜层包括凹陷区,凹陷区的底部露出衬底的表面,且凹陷区的底部宽度小于顶部宽度,再沿凹陷区内衬底的表面依次生长缓冲层、模板层以及芯片本体,最后腐蚀掩膜层与模板层,以获取目标芯片,其中,所述目标芯片包括芯片本体。本申请提供了一种芯片制备方法与待剥离芯片结构具有剥离芯片本体更加方便,且不会造成外延面积的浪费的优点。 【EN】The application provides a chip preparation method and a chip structure to be stripped, and relates to the technical field of semiconductors. Firstly, providing a substrate, then manufacturing a mask layer along the substrate, wherein the mask layer comprises a concave area, the bottom of the concave area is exposed out of the surface of the substrate, the width of the bottom of the concave area is smaller than that of the top of the concave area, then growing a buffer layer, a template layer and a chip body along the surface of the substrate in the concave area in sequence, and finally corroding the mask layer and the template layer to obtain a target chip, wherein the target chip comprises a chip body. The application provides a chip preparation method and a chip structure to be peeled, which have the advantages that the chip body is more convenient to peel, and the waste of the epitaxial area is avoided.
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10:
[发明]
【中文】一种空心玉器的雕刻设备及雕刻方法 【EN】Carving equipment and method for hollow jade article
申请号:
201911386918.3
公开号:CN111002743A 主分类号:B44B11/00
申请人:
【中文】王冠军【EN】Wang Guanjun
申请日:2019.12.29 公开日:2020.04.14
发明人:
【中文】王冠军
;
张红伟
;
赵桂芬
;
王赵辉
;
王赵琦
;
郜文娟
;
胡红叶
;
曾浩
;
王赵莅
;
王文龙
;
王五松
;
杜亚东
;
王致远
;
王宁静【EN】Wang Guanjun
;
Zhang Hongwei
;
Zhao Guifen
;
Wang Zhaohui
;
Wang Zhaoqi
;
Gao Wenjuan
;
Hu Hongye
;
Zeng Hao
;
Wang Zhaoli
;
Wang Wenlong
;
Wang Wusong
;
Du Yadong
;
Wang Zhiyuan
;
Wang Ningjing
摘要:【中文】一种空心玉器的雕刻设备,包括依次串联固定的手柄管、波纹管、调节作业部分;调节作业部分包括固定管,固定管的管壁上设有前方开口的环状槽,环状槽内设有伸缩管且伸缩管能在环状槽内滑动,伸缩管的动力为伸缩油缸,具体为:该伸缩油缸的缸体端固定在固定管内,该伸缩油缸的活塞端固定伸缩管的后端,固定管的外表面固定前后设置的两组支撑架,每组支撑架包括径向分布的三个支腿,三个支腿均匀分布在同一个平面上。本发明还公开了一种使用上述雕刻设备的雕刻方法。相对于现有技术,本发明设计有波纹管及调节弯头,使雕刻作业头弯曲于手柄轴线,甚至能做复杂的弯曲,丰富了雕刻角度,方便了人们雕刻作业。 【EN】The carving equipment for the hollow jade article comprises a handle pipe, a corrugated pipe and an adjusting operation part which are sequentially connected in series and fixed; adjust the operation part including fixed pipe, be equipped with the cyclic annular groove of place ahead open-ended on the pipe wall of fixed pipe, the cyclic annular inslot is equipped with flexible pipe and can slide in cyclic annular groove, and the power of flexible pipe specifically is for flexible hydro-cylinder: the cylinder body end of this flexible hydro-cylinder is fixed in the fixed tube, and the rear end of flexible pipe is fixed to the piston end of this flexible hydro-cylinder, and two sets of support frames that set up around the surface mounting of fixed tube, every group support frame include radial distribution's three landing leg, and three landing leg evenly distributed is on same plane. The invention also discloses an engraving method using the engraving equipment. Compared with the prior art, the invention is provided with the corrugated pipe and the adjusting elbow, so that the carving operation head can be bent on the axis of the handle, even can be bent in a complex way, the carving angle is enriched, and the carving operation of people is facilitated.
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